1. Field of the Invention
The present invention relates to a semiconductor device into which a passive element or an active element, to exhibit a specific electric functional such as a capacitor, resistor, inductance or the like, which will be referred to as an “additional functional element” hereinafter, is incorporated. The present invention also relates to a method of manufacturing such a semiconductor device.
2. Description of the Related Art
In the case of a semiconductor device such as MPU (micro processing unit), CPU (central processing unit) or the like having a large number of transistors, in which the electric power sources of these transistors are simultaneously switched, that is, these transistors are simultaneously turned on and off, a high intensity of electric current flows between the electric power source and the ground when the transistors are switched. Therefore, voltage fluctuates, that is, what is called “simultaneous switching noise” is generated. In order to reduce the noise, it is conventional to take countermeasures in which a decoupling capacitor is mounted outside the semiconductor element.
Further, it is conventional that a capacitor is mounted on a package or a wiring board on which the semiconductor element is mounted. However, there is a demand for increasing the processing speed, arranging the components highly intensively and reducing the voltage. In response to this demand, it has become a serious problem to take countermeasures to reduce the switching noise. Therefore, it has been conventionally tried to incorporate a capacitor into the package closer to the semiconductor element. However, when the capacitor is incorporated into the package closer to the semiconductor element, the package manufacturing process becomes complicated and the manufacturing cost is inevitably raised.
In the semiconductor device disclosed in Japanese Unexamined Patent Publication No. 8-148595 (JP'595), a chip carrier is formed on an alumina ceramic substrate, and a decoupling capacitor made of high dielectric material is formed in the chip carrier, and a large-scale integrated circuit (LSI) chip is mounted on the chip carrier.
In the semiconductor device disclosed in this Patent Publication (JP'595), a decoupling capacitor is formed in a chip carrier. However, in this structure, a semiconductor element, that is, an LSI chip is not directly mounted on an alumina ceramic material which is a package. Therefore, a conventionally used package cannot be used as it is.
Japanese Unexamined Patent Publication No. 9-199374 (JP'374) discloses a thin film condenser, a package, used for a semiconductor device, on which the thin film condenser is mounted, and a semiconductor device. That is, in order to make the handling easy so that mounting can be easily performed, and further in order to effectively reduce the noise generated from the electric power source system, a thin film condenser made of a highly dielectric film is formed in a semiconductor package. According to the constitution shown in FIG. 15 of this Patent Publication (JP'374), a thin film condenser is connected to a semiconductor chip, and this semiconductor chip is mounted on a package body.
According to this Patent Publication (JP'374), a thin film condenser made of a highly dielectric film is formed in a semiconductor package. However, only one face of the thin film condenser is connected to the semiconductor element, and the other face of the thin film condenser is not connected to the package. Therefore, a region of the package cannot be effectively used.
Further, in Japanese Unexamined Patent Publication No. 10-209323 (JP'323), there is disclosed a semiconductor device in which a plurality of leads are arranged in the periphery of a printed wiring board and solder balls are arranged on a lower face of the printed wiring board as a plurality of contacts to electrically connect a circuit, which is formed on an upper face of the semiconductor chip, to pads, bonding wires, printing wires and electrodes. In this Patent Publication (JP'323), there is also disclosed a structure in which a small passive element is arranged in the periphery of a gap between the substrates.
According to this Patent Publication (JP'323), a plurality of small passive elements are arranged in the periphery between semiconductor substrates or between a printed wiring board and a mother board. However, each passive element is connected to only one electrode between both substrates. Although clearance between both the substrates can be ensured, a sufficiently effective countermeasure can not be taken for reducing switching noise.